The present invention concerns the provision of a method and circuitry to protect a programmable read-only memory (PROM) or programmable logic array within an integrated circuit from unauthorized access.
Once a PROM or programmable array of logic within a very large scale integrated (VLSI) circuit has been programmed and verified, it is often desirable to prevent further access by other than logic internal to the VLSI circuit. The restriction of access may be, for example, to prevent further programming of the PROM or to prevent examination of the contents of the PROM.
In the prior art, the burning of a security fuse has been used after programming a programmable array of logic (PAL) to prevent further programming. However, the use of such a security fuse could cause difficulty when applied to a PROM within an integrated circuit. Particularly, in the prior art, there is no way for a manufacture to test the integrity of the security which implements the security fuse prior to use by a user. The inability to test the security logic would, if the security logic were utilized in a PROM, result in a manufacturer being required to develop a very reliable manufacturing process in order to guarantee the shipment of a high yield of working products.